Formal Design Flows for Embedded IoT Hardware

Authors: Michael Dossis

Publish Date: 2017

Volume: , Issue: , Pages: 27-55

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Abstract

Taking into account the current complexity of IoT devices and hardware/software modules there is a need to shorten the design time of embedded systems along with their custom hardware blocks Already many microcontroller vendors include embedded hardware security blocks into their products so as to prohibit the potential security attackers and threats Moreover when the hardware design tools and methods are based on formal and rapid techniques then producttomarket delays are eliminated This chapter discusses a novel highlevel synthesis technique which is rapid and is based on formal methodologies This synthesisbased methodology is used for the rapid and formal development of custom hardware blocks that collaborate with their host environment to deliver complete IoT nodes Due to the formal nature of the logic programmingbased synthesis transformations of the design tools the produced hardware is provably correct in respect with the given executable specifications in highlevel program code Moreover the automatically generated verification testbenches from exactly the same synthesis design model make the verification unified formal and rapid The discussed synthesis and verification approach is rapid flexible formal and includes a number of input and output language format making it suitable to plug into any of the industrial design flows A number of design experiments prove the usability of the discussed design flow

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