Authors: Hatem M ElBoghdadi
Publish Date: 2015/01/01
Volume: 71, Issue: 4, Pages: 1177-1195
Abstract
Parallel prefix circuits have drawn high interest because of their importance in many applications such as fast adders Most proposed parallel prefix circuits assume fixed width The input size could be of the same width as the circuit or different than the width of the circuit In this paper we propose a class of reconfigurable parallel prefix circuits checkRcircuits that support different operational modes The checkRcircuit can be reconfigured as one parallel prefix circuit of high width as well as several smaller width parallel prefix circuits that can operate on different prefix problems in parallel In particular an checkRcircuit checkRkm of width km with k building blocks slices each of width m can be configured as a number of z prefix circuits zle k each of width b j such that sum nolimits j=1z b j =km For a circuit CR b in checkRkm of b slices and width bm we show how such circuit can be constructed We derive a bound for the depth of CR b and show how CR b can handle input size nge bm Then we show the performance of checkRkm and compare it with other fixed samewidth prefix circuits
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