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Title of Journal: J Sign Process Syst

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Abbravation: Journal of Signal Processing Systems

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Springer US

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DOI

10.1016/0304-3959(84)90684-5

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ISSN

1939-8115

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Exploration of SoftOutput MIMO Detector Implement

Authors: Robert Fasthuber Min Li David Novo Praveen Raghavan Liesbet Van Der Perre Francky Catthoor
Publish Date: 2010/06/08
Volume: 64, Issue: 1, Pages: 75-92
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Abstract

Emerging Software Defined Radio SDR baseband platforms are based on multiple processors with massive parallelism Although the computational power of these platforms would theoretically enable SDR solutions with advanced wireless signal processing existing work implements still rather basic algorithms For instance current MultipleInput MultipleOutput MIMO detector implementations are typically based on simple linear hardoutput and not on advanced nearMaximum Likelihood ML softoutput detection However only the latter enables to exploit the full potential of MIMO technology In this work we explore the feasibility of advanced softoutput nearML MIMO detectors on massive parallel processors Although such detectors are considered to be very challenging due to their high computational complexity we combine architecturefriendly algorithm design application specific instructions and instructionlevel/datalevel parallelism explorations to make SDR solutions feasible We show that by applying the proposed combination of techniques it is possible to obtain SDR implementations which can deliver data rates that are sufficient for future wireless systems For example a 2 × 4 Coarse Grain Array CGA processor with 16way Single Instruction Multiple Data SIMD can deliver 192/368 Mbps throughput for 2 × 2 64/16QAM transmissions Finally we estimate the area and power consumption of the programmable solution and compare it against a traditional Application Specific Integrated Circuit ASIC approach This enables us to draw conclusions from the cost perspective


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  1. Biometric-oriented Iris Identification Based on Mathematical Morphology
  2. Tracking Forecast Memories for Stochastic Decoding
  3. Power Efficient Signal Processing for mmWave 5G Systems
  4. An Efficient Architecture for Sequential Monte Carlo Receivers in Wireless Flat-Fading Channels
  5. Energy Efficiency Optimization for Communication of Air-Based Information Network with Guaranteed Timing Constraints
  6. Embedded Hypercube Graph Applied to Image Analysis Problems
  7. The Rate-Distortion Optimized Compressive Sensing for Image Coding
  8. Times Square – Marriage of Real-Time and Logical-Time in GALS and Synchronous Languages
  9. A 13 Gbps, 0.13 μ m CMOS, Multiplication-Free MIMO Detector
  10. Automatic Synthesis of Parsers and Validation of Bitstreams Within the MPEG Reconfigurable Video Coding Framework
  11. Editorial
  12. DART—a High Level Software-Defined Radio Platform Model for Developing the Run-Time Controller
  13. Utilization of Pipeline Technique in AOP Based Multipliers with Parallel Inputs
  14. Design and Analysis of Hierarchically Modulated BICM-ID Receivers With Low Inter-Layer Interferences
  15. Area Efficient Sequential Decimal Fixed-point Multiplier
  16. Design of High Performance 8 bit Multiplier using Vedic Multiplication Algorithm with McCMOS Technique
  17. Power-Efficient State Exchange Scheme for Low-Latency SMU Design of Viterbi Decoder
  18. Traceback-Based Optimizations for Maximum a Posteriori Decoding Algorithms
  19. An Authentication Technique for Image/Legal Document (ATILD)
  20. Matrix Merging Scheme and Efficient Decoding Techniques for Reconfigurable QC-LDPC Decoders
  21. Real-Time Embedded Software Design for Mobile and Ubiquitous Systems
  22. A High-level Microprocessor Power Modeling Technique Based on Event Signatures
  23. Optimized Implementation of RNS FIR Filters Based on FPGAs
  24. Entropy Power Inequality for Learning Optimal Combination of Kernel Functions
  25. Dynamic Spectrum Access is the Solution: What’s the Problem?
  26. AI Based Network and Radio Resource Management in 5G HetNets

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