Authors: Robert Fasthuber Min Li David Novo Praveen Raghavan Liesbet Van Der Perre Francky Catthoor
Publish Date: 2010/06/08
Volume: 64, Issue: 1, Pages: 75-92
Abstract
Emerging Software Defined Radio SDR baseband platforms are based on multiple processors with massive parallelism Although the computational power of these platforms would theoretically enable SDR solutions with advanced wireless signal processing existing work implements still rather basic algorithms For instance current MultipleInput MultipleOutput MIMO detector implementations are typically based on simple linear hardoutput and not on advanced nearMaximum Likelihood ML softoutput detection However only the latter enables to exploit the full potential of MIMO technology In this work we explore the feasibility of advanced softoutput nearML MIMO detectors on massive parallel processors Although such detectors are considered to be very challenging due to their high computational complexity we combine architecturefriendly algorithm design application specific instructions and instructionlevel/datalevel parallelism explorations to make SDR solutions feasible We show that by applying the proposed combination of techniques it is possible to obtain SDR implementations which can deliver data rates that are sufficient for future wireless systems For example a 2 × 4 Coarse Grain Array CGA processor with 16way Single Instruction Multiple Data SIMD can deliver 192/368 Mbps throughput for 2 × 2 64/16QAM transmissions Finally we estimate the area and power consumption of the programmable solution and compare it against a traditional Application Specific Integrated Circuit ASIC approach This enables us to draw conclusions from the cost perspective
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