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Title of Journal: J Sign Process Syst

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Abbravation: Journal of Signal Processing Systems

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Springer US

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DOI

10.1007/bf00350659

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1939-8115

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Embedded Hypercube Graph Applied to Image Analysis

Authors: Eduardo Sant’Ana da Silva Helio Pedrini
Publish Date: 2016/10/07
Volume: 88, Issue: 3, Pages: 453-462
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Abstract

Hypercubes have interesting geometric and topological properties with applications in several different fields such as computer networks information retrieval data fusion social networks coding theory and linguistics In this work we present and discuss the use of hypercubes in some image analysis problems Hypercube graphs take advantage of high dimensional features to provide lowcost image transformations The downsampling of an image is performed as a pixel permutation with no need for interpolation and consequently addition and multiplication operations The hypercube graph is employed on demand one edge at once such that there is no memory usage to traverse the image Experimental results demonstrate the effectiveness of hypercubes as a powerful space representation both in terms of computational time and memory requirements


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Other Papers In This Journal:

  1. Biometric-oriented Iris Identification Based on Mathematical Morphology
  2. Tracking Forecast Memories for Stochastic Decoding
  3. Exploration of Soft-Output MIMO Detector Implementations on Massive Parallel Processors
  4. Power Efficient Signal Processing for mmWave 5G Systems
  5. An Efficient Architecture for Sequential Monte Carlo Receivers in Wireless Flat-Fading Channels
  6. Energy Efficiency Optimization for Communication of Air-Based Information Network with Guaranteed Timing Constraints
  7. The Rate-Distortion Optimized Compressive Sensing for Image Coding
  8. Times Square – Marriage of Real-Time and Logical-Time in GALS and Synchronous Languages
  9. A 13 Gbps, 0.13 μ m CMOS, Multiplication-Free MIMO Detector
  10. Automatic Synthesis of Parsers and Validation of Bitstreams Within the MPEG Reconfigurable Video Coding Framework
  11. Editorial
  12. DART—a High Level Software-Defined Radio Platform Model for Developing the Run-Time Controller
  13. Utilization of Pipeline Technique in AOP Based Multipliers with Parallel Inputs
  14. Design and Analysis of Hierarchically Modulated BICM-ID Receivers With Low Inter-Layer Interferences
  15. Area Efficient Sequential Decimal Fixed-point Multiplier
  16. Design of High Performance 8 bit Multiplier using Vedic Multiplication Algorithm with McCMOS Technique
  17. Power-Efficient State Exchange Scheme for Low-Latency SMU Design of Viterbi Decoder
  18. Traceback-Based Optimizations for Maximum a Posteriori Decoding Algorithms
  19. An Authentication Technique for Image/Legal Document (ATILD)
  20. Matrix Merging Scheme and Efficient Decoding Techniques for Reconfigurable QC-LDPC Decoders
  21. Real-Time Embedded Software Design for Mobile and Ubiquitous Systems
  22. A High-level Microprocessor Power Modeling Technique Based on Event Signatures
  23. Optimized Implementation of RNS FIR Filters Based on FPGAs
  24. Entropy Power Inequality for Learning Optimal Combination of Kernel Functions
  25. Dynamic Spectrum Access is the Solution: What’s the Problem?
  26. AI Based Network and Radio Resource Management in 5G HetNets

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