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Title of Journal: J Comput Electron

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Abbravation: Journal of Computational Electronics

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Springer US

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DOI

10.1002/bio.3276

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1572-8137

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Yielddriven powerdelayoptimal CMOS fulladder d

Authors: Zia Abbas Mauro Olivieri Andreas Ripp
Publish Date: 2016/08/02
Volume: 15, Issue: 4, Pages: 1424-1439
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Abstract

We present the detailed results of the application of mathematical optimization algorithms to transistor sizing in a fulladder cell design to obtain the maximum expected fabrication yield The approach takes into account all the fabrication process parameter variations specified in an industrial PDK in addition to operating condition range and NBTI aging The final design solutions present transistor sizing which depart from intuitive transistor sizing criteria and show dramatic yield improvements which have been verified by Monte Carlo SPICE analysis

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