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Title of Journal: Analog Integr Circ Sig Process

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Abbravation: Analog Integrated Circuits and Signal Processing

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Kluwer Academic Publishers

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DOI

10.1007/s00595-011-0013-8

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1573-1979

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Comment on “realization of series and parallel RL

Authors: Erkan Yuce
Publish Date: 2006/06/27
Volume: 49, Issue: 1, Pages: 91-92
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Abstract

The comment is related to the recently published paper given in 1 dealing with the implementation of series and parallel RL and CD impedances using a single differential voltage current conveyor DVCC Nevertheless straightforward analysis of the circuit in Fig 3b of 1 and also given in Fig 1 shows that it has a problem because it makes its input voltage V in = 0 Therefore it can not realize parallel –L––R simulator as claimed in 1

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