Authors: Dongjun Wang Ping Luo Shaowei Zhen Yajuan He
Publish Date: 2015/07/10
Volume: 84, Issue: 3, Pages: 445-453
Abstract
An adaptive voltage scaling AVS DC–DC converter based on embedded pulse skip modulation PSM is presented in this paper As AVS technique developing the supply voltage of digital circuits can be scaled adaptively with the changing of operation frequency and working environment The critical path replica CPR is widely used in AVS implementation The worstcase margin is relaxed by probing and tracking the CPR delay time of target applications Consequently the energy consumption of digital circuits is decreased significantly with supply voltage reduced At the same time in order to improve the efficiency of DC–DC converter especially in light load the PSM mode has been used in proposed circuit structure The circuit of AVS DC–DC converter based on embedded PSM has been implemented and fabricated in a standard 013 μm CMOS process which occupies 12 mm2 active silicon areas The experimental results show that the output voltage of the DC–DC converter is well regulated from 06 to 15 V when the clock frequency varies within the range of 30–150 MHz The maximum energy saving of 83 is obtained with the proposed circuit structure compared to the traditional fixed voltage
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