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Title of Journal: Analog Integr Circ Sig Process

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Abbravation: Analog Integrated Circuits and Signal Processing

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Springer US

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DOI

10.1007/bf01376337

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1573-1979

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A digitallyassisted error compensation grouping m

Authors: John Nankoo ChunHuat Heng
Publish Date: 2015/03/18
Volume: 83, Issue: 2, Pages: 231-242
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Abstract

Linearity in currentsteering digitaltoanalog converters DAC is mainly governed by the relative amplitude mismatch between the current sources In this paper a digitally intensive statistical grouping method is presented The method is particularly suitable to be applied to large array of elements without prohibitively increasing the system complexity An offset insensitive measurement method is also proposed to implement the error compensation grouping method with greater accuracy The digitally assisted error compensation grouping method is implemented on the 7 unarydecoded most significant bits of a segmented 12 bit current steering DAC The DAC is realized in a 65 nm CMOS process Through the proposed technique the unary current source area is reduced significantly and gives rise to an overall DAC active area of 029 mm2 while achieving integral nonlinearity of ±07 LSB clearly demonstrating an improvement in unary current cells matching Due to the digitally intensive nature of the proposed architecture further area saving could be achieved when implemented in smaller gatelength process such as the 45 nm CMOS process

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