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Title of Journal: J Mater Sci Mater Electron

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Abbravation: Journal of Materials Science: Materials in Electronics

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Springer US

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DOI

10.1016/bs.ircmb.2016.09.004

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1573-482X

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Micro void growth in NiSnP layer between CuNiS

Authors: Doosoo Kim James Jungho Pak
Publish Date: 2010/02/16
Volume: 21, Issue: 12, Pages: 1337-1345
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Abstract

This study examines the growth mechanism of micro void called “Kirkendall voids” within NiSnP nanocrystalline layer between CuNi6Sn5 intermetallic compound IMC and Ni3P formed during two double reflow processes The micro voids in NiSnP layer formed at the first reflow grow faster under the elevated reflow temperature than under the standard leadfree reflow during the second reflow process Despite the diffusion barrier NiP the inward diffusion flux of Sn from CuNi6Sn5 into NiSnP layer is much slower than the outward flux of Sn from NiSnP layer into Ni3P consequently leaving voids as NiSnP thickness increases Results show that the thermal activation energy through the elevated reflow temperature has a higher influence in micro void growth than the number of reflows for the inward and outward diffusion flux difference of Sn within NiSnP layer in electroless NiP/immersion Au and SnAgCu reaction system

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